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september 2013 docid17369 rev 2 1/13 AN3193 application note stm32l1xx ultralow power features overview introduction the stm32l1xx product line belongs to the stmicroelectronics ultralow power energylite tm platform and complements the 8-bit stm8lxx family with 32-bit high- performance cortex tm -m3 based microcontrollers offering an extended memory and bigger packages. both microcontroller fa milies are based on the st's prop rietary 130 nm ultralow leakage process and have many analog and digital peripherals in common, which eases the transition from one architecture to the other an d offers users the opportunity to capitalize on the knowledge acquired on one platform. this application note describes the key low power features of the stm32l1xx family and explains their benefits for applications where energy consumption is a major concern. important note: this document is not intended to replace stm32l1xx datasheets. all values given in this document are for guidance only. please refer to the related datasheet to get guaranteed values and up-to-date characterization data. www.st.com
contents AN3193 2/13 docid17369 rev 2 contents 1 stm32l1xx main features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 energy-efficient processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 numerous low power modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 a set of peripherals tailored for low power . . . . . . . . . . . . . . . . . . . . . . 7 5 a versatile clock management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 6 ultra-safe supply monitoring . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 7 conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 8 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
docid17369 rev 2 3/13 AN3193 stm32l1xx main features 13 1 stm32l1xx main features based on the solid foundations of the award-winning stm32f10x family, the stm32l1xx embeds various innovations which minimize t he consumption in different configurations, while maintaining most of the existing peripherals and a quasi pin-to-pin compatibility. for a given manufacturing process and die area, the consumption of a microcontroller largely depends on two factors which can be controlled dynamically: voltage and frequency. in the stm32l1xx devices, an internal low drop regulator supplies most of the logic circuitry with a fixed voltage: this guarantees that c onsumption is kept mini mal whatever the supply voltage, along the lifetime of portable battery-supplied products, down to 1.65 v. if we consider the clock sources, several cascaded clock prescalers, gating techniques and peripheral-by-peripheral clock management allow only the necessary logic gates to be activated, and at the adequate frequency. th ese are now design practices commonly used for reducing the consumption in run mode. for the stm32l1xx, additional efforts have been done in this direction with the implementation of voltage scaling to reach an even higher processing efficiency. however, all ultralow power requirements cannot be met by simply focusing on run time: for most applications, the challenge is to spend th e minimum time and energy in this mode and find the adequate low power mode. the improvements do not come only from the deep sleep modes optimized to eliminate every ten na of leakage. the system has also been complemented with seven low power modes and a set of peripherals tuned for low power (such as the calendar real-time clock and glass lcd controller). these items are described in more detail hereafter.
energy-efficient processing AN3193 4/13 docid17369 rev 2 2 energy-efficient processing the stm32l1 is built around the cortex-m3, an industry standard 32-bit core, which has been designed, among other criteria, for low power applications. the cortex-m3 offers a class-leading performance and code density. although performance is not naturally linked with low current consumption, it is a key benefit for most of the low power applications which have to wake up periodically to execute soft ware tasks. in this case , the cortex-m3 spends less time in run mode due to its processing performance, thus maximizing the time in deep sleep mode. if we consider only the proc essing consumption, expressed in ma/dmips (dmips standing for dhrystone mips measured using the public benchmark rev 2.0), the performance of the cortex m3 is significantly better than that of the other architectures, in particular 16-bit microcontrollers. the performance in dmips/mhz being given by the core and its memory interface, the processing consumption in ma/dmips can be maximized using voltage scaling. this method, also called undervolting, consists of adapting dynamically the supply voltage of the internal logic with the operating frequency. the stm32l1xx offers three dynamically selectable voltage ranges, as summarized in the following figure, from 1.8 v (range 1) down to 1.2 v (range 3), which offers a gain of more than 25% in terms of consumption.
docid17369 rev 2 5/13 AN3193 energy-efficient processing 13 figure 1. stm32l1xx performance versus vdd and vcore range a typical example is portable healthca re equipment with usb device capability. as long as it works in standalone mode, 4 mhz are sufficient to acquire and process the data from the analog front-end. in this case, the internal logic can be supplied with 1.2 v only. however, executing a usb software stack wh en the system is connected to the usb interface of a pc requires more processing power: in this case, the device can be placed in "high-performance mode", where the internal volt age is 1.8 v. it can then execute code at 32 mhz while the usb peripheral is supplied by a 48 -mhz clock. voltage scaling is used to deal with the contradictory requirements of t hese two operating modes without having to compromise on the dynamic current consumption. 1 16 mhz 4mhz mh z 32 mhz 1.2v 1.5v 1 . 8v v core 1.65v - 3.6v 2v - 3.6v 32 1 f cpu > 2 mhz 1ws 16mhz 8 mhz 2 mhz 32 16 8 0w s 4 ai178201 v dd f cpu > 8 mhz 1ws 0w s f cpu > 16 mhz 1ws 0w s 178 a / mhz 195 a / mhz 240 a / mhz 2 range 2 range 3 range 1
numerous low power modes AN3193 6/13 docid17369 rev 2 3 numerous low power modes at a higher architectural level, the power consumption of the stm32l1 can be modulated by entering one of seven low power modes. the power consumption can be reduced by progressively disabling the frequency-independen t current sources (the clock sources, the non-volatile memory and the regulator) up to the point where most of the chip is powered down. the following table summarizes the featur es available for each mode and provides an indication of the current consumption. table 1. stm32l1xx low power mode overview two new modes have been implemented on the stm32l1xx in addition to the stm32f modes: the low power run and low power slee p modes. they offer run and sleep mode functionality for applications with extrem ely low current consumption where some peripherals cannot be switched off (for instance communication peripherals or timers), or where the cpu is processing continuously at low speed to minimize current variations. several functional blocks can be used to reach a very low current: ? the voltage regulator is in low power (lp) mode to reduce its quiescent current ? non-volatile memory can be switched off, processing being done on the 16-kbyte ram ? the master clock source co mes from the msi internal rc oscillator, which can be reduced down to 1.5 a. the maximum current that the regulator can deliver in lp mode only limits the operating frequency and the number of peripherals that can be activated. low power mode consumption cpu flash / eeprom ram dma & periph. clock lcd rtc sleep 100 a/mhz (range 1) no on on active any available 82 a / mhz (range 2) 65 a/mhz (range 3) low power run 10.4 a (flash off, 32 khz) yes on or off on active msi available low power sleep 5.1 a (periph. off) no off on active msi available 6.1 a (1 timer on) stop with rtc 1.3 a (1.8 v) no off on frozen lse, lsi available 1.6 a (3 v) stop 500 na no off on frozen lse, lsi off off standby with rtc 1.3 a (3 v) off off off off lse, lsi off on 1 a (1.8 v) standby 270 na off off off off lse, lsi off off
docid17369 rev 2 7/13 AN3193 a set of peripherals tailored for low power 13 4 a set of peripherals tailored for low power several peripherals require sp ecial attention, either because of their intrinsic high consumption or because they are always powered up. the stm32l1xx embeds a 12-bit / 1 msps adc. this very fast but accurate converter can jeopardize the battery lifetime if left power ed-up continuously, with a 1.45 ma typical consumption. with its calibration-free archit ecture, fast power-up time of 3.5 s and a conversion time of 1 s, 6 conversions can be achieved within less than 10 s, and the adc can be shut down immediately afterwards. if this is done at a 1-khz rate, it represents not more than 10.5 a of the adc related average consumption. the time required to switch on and off a peri pheral is negligible at high speed, but can become significant for a low operating frequency: at 1 mhz, each instruction lasts as long as the adc conversion itself. when the adc operat es at such a low frequency, the conversion time is also significantly increased without bene fits for the end application. to reduce the consumption and allow the most efficient use of this fast converter, the adc digital interface has been designed to operate in a completely independent manner, at its maximum speed, whatever the cpu operating frequency (which can range from ?sub -khz? up to 32 mhz), using an internal 16 mhz clock source. it also includes auto shut-down modes to reduce the software overhead and to cope with a very low cpu frequency. at 32 khz, each instruction lasts 30 s: a burst of conversion can be launched between two cycles, with the adc powered-off automatically, so that the adc extra consumption can be limited to the necessary time only (for single conversions, during 4.5 s out of the 30 s cpu period). three peripherals have been developed to operate continuously even in stop mode, where the system clock is stopped, with the main os cillator and memory powered down. ? a pair of ultralow comparators is available to monitor analog voltages with a current down to 3 a. these comparators can wake up the mcu as soon as the external voltage reaches the selected threshold and they can be combined together to provide a window comparator. one of thes e comparators has a rail-to-r ail input capability and its output can be redirected to a ti mer for a general purpose use. ? an rtc peripheral provides a clock/calendar with two alarms, includes a periodic wake-up unit and several application specif ic functions (timestamp, tamper detection ?). it can remain enabled in the lowest power mode (standby) where most of the chip is powered down, and wake up the full mcu circuitry in case of an alarm or tamper detection for instance. it also contains 80 by tes of backup register s to store contextual information when exiting from standby mode. this peripheral has been designed using asynchronous design techniques to mi nimize its consumption (below 1 a). ? the glass lcd is one of the most common displays in low power applications, because of its inherently low current consumption, low price and customization easiness. the stm32l1xx includes a versatile lcd controlle r, which can drive di splays with up to 8 common lines and 40 segments, with the capa bility of selecting individually the i/o ports assigned to the lcd for an optimal use of the chip alternate functions. it also controls an optional internal step-up converter to maintain the lcd contrast on a wide range of v dd values with consumptions as low as 5 a (lcd consumption not included).
a versatile clock management AN3193 8/13 docid17369 rev 2 5 a versatile clock management a reset and clock controller (rcc) peripheral manages the five possible clock sources of the stm32l1. two external oscillators can be used for applications requir ing a high precision: ? the hse clock (4-24 mhz high speed external clock), typically used to feed the pll and to generate a cpu clock frequency of up to 32 mhz and a 48-mhz frequency for the usb controller. ? the lse (typically 32.768 khz low speed exte rnal clock) usually used to provide a low power clock source to the real time clock but which can also be used as lcd clock. three internal oscillators can be selected for various tasks: ? the lsi clock (37 khz low speed internal clock) is a low accuracy ultralow power source that can feed the real time clock (with a limited accuracy), the lcd controller and the independent watchdog. ? the hsi clock (16 mhz high speed internal clock) is a high speed voltage- compensated oscillator. ? the msi clock (64 khz to 4 mhz multi spee d internal clock) is a medium accuracy oscillator with adjustable freq uency and low current consum ption. it is designed to operate with a current proportional to the frequency, so as to minimize the internal oscillator consumption overhe ad for the low cpu frequenc ies. the following table summarizes the characteristics and uses of the various oscillators. table 2. stm32l1xx clock source characteristics (preliminary data (1) ) clock source use frequency consumption (typical) accuracy factory trimming user trimmable hse master clock (+ rtc & lcd) 1-24 mhz 0.5 to 0.7 ma crystal dependent, down to tens of ppm not applicable lse rtc and lcd 32.768 khz (typical) 0.45 a (1.8 v) 0.6 a (3 v) crystal dependent, down to a few ppm hsi master clock 16 mhz 100 a 1% typical (2) yes (2) yes msi master clock 64 khz 128 khz 256 khz 512 khz 1.02 mhz 2.1 mhz 4.1 mhz 0.6 a 0.9 a 1.4 a 2.2 a 4 a 7 a 12 a 0.5% typical yes yes lsi rtc, lcd & ind. wdg 38 khz 0.4 a (3 v) -30% to +50% (3) no no, but f lsi can be measured 1. based on preliminary characterization or design simulations. see product datasheet for detailed electric al characteristics 2. on the value line family (stm32l100xx dev ices) the hsi oscillator is not trimm ed, therefore please refer to device datasheet for the correct accuracy. 3. -10% to +4% drift after initial measurement
docid17369 rev 2 9/13 AN3193 a versatile clock management 13 the price of a crystal oscillator may not be neglected in cost sensitive applications. for this reason, the stm32l1xx offers several options to measur e the internal oscillators. although hsi and msi are factory trimmed (exce pt for the stm32l100 value line devices), they can be further trimmed by 0.5% steps during run time to compensate for frequency deviations due to temperature and voltage changes. similarly, manufacturing process deviations of the lsi can be evaluated and compensated using a higher accuracy clock reference, either internally (hsi) or ex ternally (lse or hse). as an example, in an application where a 32.7 68 khz crystal is used for the rtc, it is interesting to use the low powe r msi oscillator which can provid e a clock frequency of up to 4 mhz for the cpu with a typical consumption of 20 a. taking advantage of the high precision of the lse crystals (typic ally a few tens of ppm), it is possible to determine the msi frequency with the same resolution, and then to trim it on-the-fly.
ultra-safe supply monitoring AN3193 10/13 docid17369 rev 2 6 ultra-safe supply monitoring the stm32l1xx includes a sophisticated su pply supervisor mo dule with several programmable options. this module is active during both power-on/down and run-time phases. the power-up is a critical phase where the va rious parts of the internal circuitry must be sequentially started and critical parameters (s uch as factory trimming values or options) retrieved from the non-volatile memory to perf orm mcu initialization, even before the user's reset phase. this is also during this period that v dd can be altered with glitches coming from the battery insertion or be cause of a weak power source. the ultra safe power-on reset circuitry guarante es that the reset is released only if the v dd is above 1.8 v, whatever the slope of the v dd ramp-up phase, so that the circuit is within its guaranteed operating conditions when the program execution starts. once the power-up phase is completed, the us er can choose to activate or not the brown- out reset (bor) detector for a continuous battery monitoring, and select one of 5 thresholds. this is an option stored in the non-volatile memory to make this power supervision completely software independent. it is completed by a 7-level programmable voltage detector (pvd) that can be enabled by software to generate an early interrupt in case of a voltage drop. the consumption of both the bor and pvd m odules is below 3 a, when continuously powered, but it can remain si gnificant in the deep sleep modes. if needed, the power supervision module can be programmed to have the bor and the pvd disabled during the deep sleep phase and enabled again automati cally on wake-up events. this minimizes the current consumption when the application is in idle mode (with usually a slightly higher and very stable supply due to an extremely light lo ad). however, this does not jeopardize the safety when the execution starts again. the stm32l1 is one of the few standard mcus on the market with an operating range down to 1.65 v and only very few limitations (usb, adc and dac cannot be used but all other features are functional). a dedicated stm32l1xx device with permanently disabled bor is available and can be used in applic ations with a voltage tolerance of 1.8 v ?? 8%. in this case, a "zero current" power-on / power-down reset (por/pdr) module remains active and releases the reset after a hard-coded temporization. it is then up to the user to guarantee that the v dd slope during the start-up is steep enough to reach at least 1.65 v when the reset vector is fetched.
docid17369 rev 2 11/13 AN3193 conclusion 13 7 conclusion the main features of the stm32l1xx devices ar e presented in this application note. they show the benefits offered by this microcontroller family to reduce the mcu's current consumption in embedded systems. the stm32l1 family extends the st's energylite tm platform for applications requiring additional memory sizes and bigger packages. it complements the stm32 portfolio keeping compatibility with ot her stm32 devices. with its cortex-m3 core and its energy-efficie nt architecture system, this microcontroller family supports low power modes without compromizing the processing performance. its rich set of peripherals can cover a wide range of applications, while numerous low power modes give a full flexibility to adjust on -the-fly the consumption to any task. this results in an extended operating lifetime for today's and tomorrow's always greener applications.
revision history AN3193 12/13 docid17369 rev 2 8 revision history table 3. document revision history date revision changes 16-apr-2010 1 initial release. 20-sep-2013 2 changed to apply to all stm32l1 family.
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